The effects of gate electrodes made of tungsten silicides and/or polysilicon on the dielectric characteristics of very thin gate oxides have been studied. For a WSix/SiO2 (100 Å)/Si gate structure, the phase transition from hexagonal to tetragonal WSi2 and the induced stress demonstrated the degradation of dielectric strength of gate oxide annealed at 700°C. Tungsten diffusion to the interface between SiO2 and Si substrate as well as the enhnaced local strain caused the deterioration of breakdown fields for annealing temperatures above 900°C. Drastic generation of hole traps at 1000°C annealing further diminished the field to breakdown of thin oxide. For WSix/poly-Si/SiO2 (100 Å)/Si and poly-Si/SiO2 (100 Å)/Si structures annealed at 1000°C, phosphorus diffusion to the SiO2/Si interface was also harmful to the dielectric characteristics of gate oxides besides the high-temperature hole trap generation and the thermally induced stress. Hence, MOS capacitors of WSix/poly-Si/SiO2 (100 Å)/Si structures seemed to be superior to the other two structures when the sheet resistivity factor was also considered. The effect of thickness of gate oxide on the dielectric properties of three gate structures was also investigated.