The channel length extension in poly-Si TFTs with LDD structure

Hsiao-Wen Zan*, Kuang Ming Wang

*Corresponding author for this work

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

In this letter, the resistance of the lightly doped drain (LDD) region in n-channel polycrystalline-silicon thin-film transistors (poly-Si TFTs) was analyzed. It was found that the LDD resistance was composed of an LDD-length-dependent part and a gate-bias-dominant part. The latter was located next to the gate edge and was governed by the channel extension phenomenon with an extended length of around 0.55 μm under a 10-V gate bias. The current density distribution simulated by Silvaco ATLAS supported this severe fringing field effect. The influences of the gate bias, LDD doping level, gate oxide thickness, and LDD length on the channel extension are also investigated with Silvaco ATLAS simulation. This letter is the first report of long channel extensions in the LDD region of poly-Si TFTs. The result may significantly influence the device model in the short channel regime.

Original languageEnglish
Pages (from-to)1034-1036
Number of pages3
JournalIEEE Electron Device Letters
Volume29
Issue number9
DOIs
StatePublished - 5 Sep 2008

Keywords

  • Effective channel length
  • Lightly doped drain (LDD)
  • Parasitic resistance
  • Polycrystalline-silicon thin-film transistor (poly-Si TFT)

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