The 1-V 24-GHz low-voltage low-power current-mode transmitter in 130-nm CMOS technology

Wen Chieh Wang*, Chung-Yu Wu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

14 Scopus citations

Abstract

A new high frequency CMOS current-mode up-conversion mixer is proposed to realize the transmitter front-end in the frequency band of 24 GHz. The transmitter integrates with a double-balance current-mode up-conversion mixer, an IF amplifier/repeater, a differential VCO and a differential VCO buffer/repeater. The performance of the transmitter exhibits a conversion gain of 1.3 dB, the input 1-dB compression point (P-1dB) is -22 dBm, the input intercept 3rd-order compression point (PIIP3) is -8.75 dBm, and the output intercept 3rd-order compression point (POIP3) is -7.44 dBm. The phase noise of the differential VCO is -117 dBc/Hz at 10-MHz offset from 26 GHz. The proposed mixer consumes only 3.89 mW from a 1-V supply. The total power dissipation of the transmitter is 15.4 mW from 1-V supply. This chip is designed in 0.13-μm 1P8M CMOS technology and under fabrication.

Original languageEnglish
Title of host publicationProceedings of the 2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007
Pages49-52
Number of pages4
DOIs
StatePublished - 1 Dec 2007
Event2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007 - Bordeaux, France
Duration: 2 Jul 20075 Jul 2007

Publication series

NameProceedings of the 2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007

Conference

Conference2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007
CountryFrance
CityBordeaux
Period2/07/075/07/07

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