Abstract
Several new real-time systolic implementations for three popular Kalman filtering algorithms are presented. These architectures are all composed of two units of systolic arrays, where the first one is based on three new systolic arrays for matrix multiplications and additions, while the second one is a conventional systolic array for matrix inversion. Mathematical formulations of the three Kalman filtering algorithms are scheduled for the best deployment of those systolic arrays. This results in nine new systolic Kalman filters. Among them, one has the best performances in both speed and hardware complexities among the existing architectures. Specifically, this architecture has a smaller number of O(2n2) PE's than O(2.5n2) PE's of the best known structures, and a highest throughput rate.
Original language | English |
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Pages | 97-102 |
Number of pages | 6 |
State | Published - 1 Dec 1994 |
Event | Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems - Taipei, Taiwan Duration: 5 Dec 1994 → 8 Dec 1994 |
Conference
Conference | Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems |
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City | Taipei, Taiwan |
Period | 5/12/94 → 8/12/94 |