Systolic implementation of Kalman filter

Sau-Gee Chen*, Jiann Cherng Lee, Chieh Chih Li

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

4 Scopus citations

Abstract

Several new real-time systolic implementations for three popular Kalman filtering algorithms are presented. These architectures are all composed of two units of systolic arrays, where the first one is based on three new systolic arrays for matrix multiplications and additions, while the second one is a conventional systolic array for matrix inversion. Mathematical formulations of the three Kalman filtering algorithms are scheduled for the best deployment of those systolic arrays. This results in nine new systolic Kalman filters. Among them, one has the best performances in both speed and hardware complexities among the existing architectures. Specifically, this architecture has a smaller number of O(2n2) PE's than O(2.5n2) PE's of the best known structures, and a highest throughput rate.

Original languageEnglish
Pages97-102
Number of pages6
StatePublished - 1 Dec 1994
EventProceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems - Taipei, Taiwan
Duration: 5 Dec 19948 Dec 1994

Conference

ConferenceProceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems
CityTaipei, Taiwan
Period5/12/948/12/94

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