Surface-potential-plus approach for next generation CMOS device modeling

Jin He*, Xuemei Xi, Hui Wan, Mansun Chan, Ali Niknejad, Chen-Ming Hu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper outlines the advanced Surface-Potential-Plus (SPP) approach for the next generation CMOS device modeling. The main object of this approach is to develop a continuous, completely symmetric and accurate advanced charge-based MOS transistor model from the basic device physics including various physics effects. A unified exact inversion charge relation valid for uniform and retrograde doping cases is first obtained. Various small dimensional effects are elucidated and integrated concisely into this model. Comparison with measured data is finally presented to validate the new model. Importantly, it was also extended to UTB and double-gate MOSFETs.

Original languageEnglish
Title of host publicationExtended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004
EditorsX.P. Qu, G.P. Ru, B.Z. Li, B. Mizuno, H. Iwai
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages321-324
Number of pages4
Volume4
ISBN (Print)7309039157
DOIs
StatePublished - 16 Aug 2004
EventExtended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004 - Shanghai, China
Duration: 15 Mar 200416 Mar 2004

Conference

ConferenceExtended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004
CountryChina
CityShanghai
Period15/03/0416/03/04

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  • Cite this

    He, J., Xi, X., Wan, H., Chan, M., Niknejad, A., & Hu, C-M. (2004). Surface-potential-plus approach for next generation CMOS device modeling. In X. P. Qu, G. P. Ru, B. Z. Li, B. Mizuno, & H. Iwai (Eds.), Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004 (Vol. 4, pp. 321-324). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IWJT.2004.1306870