Suppression of Boron Penetration in P+ Polysilicon Gate P-MOSFET‘s Using Low-Temperature Gate-Oxide N2O Anneal

Z. J. Ma, J. C. Chen, J. T. Krick, Chen-Ming Hu, P. K. Ko, Z. H. Liu, Y. C. Cheng

Research output: Contribution to journalArticlepeer-review

79 Scopus citations

Abstract

It has been reported that high-temperature (∼1100°C) N20-annealed oxide can block boron penetration from poly-Si gates to the silicon substrate. However, this high-temperature step may be inappropriate for the low thermal budgets required of deep-submicron ULSI MOSFET's. In this study, we show that low-temperature (900∼950°C) N2O-annealed gate oxide is also a good barrier to boron penetration. For the first time, the change in channel doping profile due to compensation of arsenic and boron ionized impurities was resolved using MOS C-V measurement techniques. It was found that the higher the nitrogen concentration incorporated at Si/SiO2 interface, the more effective is the suppression of boron penetration. The experimental results also suggest that, for 60~110 Å gate oxides, a certain amount of nitrogen (~2.2%) incorporated near the Si/SiO2 interface is essential to effectively prevent boron diffusing into the underlying silicon substrate.

Original languageEnglish
Pages (from-to)109-111
Number of pages3
JournalIEEE Electron Device Letters
Volume15
Issue number3
DOIs
StatePublished - 1 Jan 1994

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