Study of SrTiO3 gate dielectrics

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Among various possible candidates of high-k gate dielectrics, SrTiO 3 plays an important role because it has high dielectric constant and it can be epitaxially grown on silicon substrate. The fabrication process and properties of SrTiO 3 gate dielectrics are reported. The effect of the addition of SiO 2 on the microstructure and electrical properties of SiTiO 3 gate dielectric is also presented. The minimization of the effect of interfacial layer between SrTiO 3 and Si is the most important issue for obtaining high quality high-k gate dielectrics. The possible methods to improve the interfacial properties and the measurement techniques to characterize the interfacial layer are discussed.

Original languageEnglish
Title of host publicationFerroelectrics and Multiferroics
Pages294-303
Number of pages10
StatePublished - 1 Dec 2006
Event2006 MRS Fall Meeting - Boston, MA, United States
Duration: 27 Nov 20061 Dec 2006

Publication series

NameMaterials Research Society Symposium Proceedings
Volume966
ISSN (Print)0272-9172

Conference

Conference2006 MRS Fall Meeting
CountryUnited States
CityBoston, MA
Period27/11/061/12/06

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  • Cite this

    Liu, C. Y., & Tseng, T-Y. (2006). Study of SrTiO3 gate dielectrics. In Ferroelectrics and Multiferroics (pp. 294-303). (Materials Research Society Symposium Proceedings; Vol. 966).