Among various possible candidates of high-k gate dielectrics, SrTiO
plays an important role because it has high dielectric constant and it can be epitaxially grown on silicon substrate. The fabrication process and properties of SrTiO
gate dielectrics are reported. The effect of the addition of SiO
on the microstructure and electrical properties of SiTiO
gate dielectric is also presented. The minimization of the effect of interfacial layer between SrTiO
and Si is the most important issue for obtaining high quality high-k gate dielectrics. The possible methods to improve the interfacial properties and the measurement techniques to characterize the interfacial layer are discussed.