Structural approach for performance driven ECC circuit synthesis

Chau-Chin Su*, Kathy Y. Chen, Shyh-Jye Jou

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

ECCGen is a logic synthesizer for error control coding circuits. It takes H matrices as inputs and produces circuit schematics in two steps, literal minimization and gate/pin assignment. Different from conventional logic synthesis tools, it takes a structural approach to avoid the combinatorial explosion problem in Boolean function and/or true table representations of ECC circuits. Moreover, the structural approach also reduce the complexity of timing and area optimization significantly when multiple-input exclusive-or gates are used. The test results show that ECCGen achieves a reduction of 57% in transistor count and 15% in delay time on thirteen industrial ECC circuits.

Original languageEnglish
Pages89-94
Number of pages6
DOIs
StatePublished - 1 Jan 1997
EventProceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC - Chiba, Jpn
Duration: 28 Jan 199731 Jan 1997

Conference

ConferenceProceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC
CityChiba, Jpn
Period28/01/9731/01/97

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