Structual design of T-gate, air-spacer poly-Si TFTs for RF applications

Yu An Huang, Yu Hsiang Yeh, Horng Chih Lin, Pei Wen Li

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We employed Sentaurus TCAD simulation to explore the impacts of major structural parameters on the electrical characteristics of poly-Si TFTs with T-gate and air spacers. The effects and trade-off between the source/drain (S/D) junctions relative to T-gate are discussed with the aim to find insightful information for the design and fabrication of real devices. Influences of the gate geometry on the parasitic capacitances of the T-gate devices are also simulated.

Original languageEnglish
Title of host publication2019 Silicon Nanoelectronics Workshop, SNW 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9784863487024
DOIs
StatePublished - Jun 2019
Event24th Silicon Nanoelectronics Workshop, SNW 2019 - Kyoto, Japan
Duration: 9 Jun 201910 Jun 2019

Publication series

Name2019 Silicon Nanoelectronics Workshop, SNW 2019

Conference

Conference24th Silicon Nanoelectronics Workshop, SNW 2019
CountryJapan
CityKyoto
Period9/06/1910/06/19

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