Stress-induced leakage current due to charging damage: Gate oxide thickness and gate poly-Si etching condition dependence

Donggun Park*, Mark Kennard, Yosias Melaku, Neil Benjamin, Tsu Jae King, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

4 Scopus citations

Abstract

Stress-Induced gate Leakage Current (SILC) was used to evaluate plasma-processes induced damage to ultra-thin gate oxide transistors. Even though the leakage currents increase as the oxide thickness decreases, the reliability of ultra-thin gate oxide, 2.2 nm, is superior to the thicker oxides. No SILC was observed for the thinnest films, while thicker oxides show large SILC variation due to process-induced charging damage. The effect of different gate poly-Si etching processes in a high density TCP plasma system were also evaluated. Only the gate that was etched with an abnormally high bias power over etch process, and connected to large connection antenna ratio shows SILC.

Original languageEnglish
Pages56-59
Number of pages4
DOIs
StatePublished - 1 Dec 1998
EventProceedings of the 1998 3rd International Symposium on Plasma Process-Induced Damage, P2ID - Honolulu, HI, USA
Duration: 4 Jun 19985 Jun 1998

Conference

ConferenceProceedings of the 1998 3rd International Symposium on Plasma Process-Induced Damage, P2ID
CityHonolulu, HI, USA
Period4/06/985/06/98

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