Strained silicon technology: Mobility enhancement and improved short channel effect performance by stress memorization technique on nFET devices

Chih Cheng Lu*, Jiun Jia Huang, Wun Cheng Luo, Tuo-Hung Hou, Tan Fu Lei

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

2 Scopus citations

Abstract

This paper presents a fundamental study of a stress memorization technique (SMT), which utilizes a capping nitride dielectric film to enhance negative channel field-effect transistor (nFET) device performance. SMT strain engineering is highly compatible with current standard complementary metal oxide semiconductor processes without introducing substantial additional complexity. In this work, we report that SMT-strained nFET exhibits a higher transconductance Gm-lin, which indicates strain-induced electron mobility enhancement. The nFET short channel effect is also improved by the SMT process. Improved Vt roll-off characteristics manifest itself and are shown to result from retarded junction diffusion as indicated by secondary-ion mass microscopy analysis. Finally, this work demonstrates that when combined with a strained contact etch stop layer (CESL) technique, SMT provides additional strain beyond that provided by the CESL, which results in further improved nFET performance.

Original languageEnglish
Pages (from-to)H497-H500
Number of pages4
JournalJournal of the Electrochemical Society
Volume157
Issue number5
DOIs
StatePublished - 27 Apr 2010

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