Stereo matching and viewpoint synthesis FPGA implementation

Chao Kang Liao*, Hsiu Chi Yeh, Ke Zhang, Vanmeerbeeck Geert, Tian-Sheuan Chang, Gauthier Lafruit

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

6 Scopus citations

Abstract

With the advent of 3D-TV, the increasing interest of free viewpoint TV in MPEG, and the inevitable evolution toward high-quality and higher resolution TV (from SDTV to HDTV and even UDTV) with comfortable viewing experience, there is a need to develop low-cost solutions addressing the 3D-TV market. Moreover, it is believed that in a not too distant future 2D-UDTV display technology will support a reasonable quality 3D-TV autostereoscopic display mode (no need for 3D glasses) where up to a dozens of intermediate views are rendered between the extreme left and right stereo video input views. These intermediate views can be synthesized by using viewpoint synthesizing techniques with the left and/or right image and associated depth map. With the increasing penetration of 3D-TV broadcasting with left and right images as straightforward 3D-TV broadcasting method, extracting high-quality depth map from these stereo input images becomes mandatory to synthesize other intermediate views. This chapter describes such Stereo-In to Multiple-Viewpoint-Out functionality on a general FPGA-based system demonstrating a real-time high-quality depth extraction and viewpoint synthesizer, as a prototype toward a future chipset for 3D-HDTV.

Original languageEnglish
Title of host publication3D-TV System with Depth-Image-Based Rendering
Subtitle of host publicationArchitectures, Techniques and Challenges
PublisherSpringer New York
Pages69-106
Number of pages38
Volume9781441999641
ISBN (Electronic)9781441999641
ISBN (Print)1441999639, 9781441999634
DOIs
StatePublished - 1 Nov 2013

Keywords

  • 3D-TV chipest
  • Autostereoscopic
  • Census Transform
  • Computational complexity
  • Cross-check
  • Depth map
  • Disparity
  • Dynamic programming
  • FPGA
  • Free viewpoint TV
  • GPU
  • Hamming distance
  • Hardward implementation
  • Hole filling
  • Matching cost
  • Real-time
  • Stereo matching
  • Support region builder
  • View synthesis
  • Warping

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