Abstract
Statistical behavior of BTI-induced high-k dielectric traps in nanometer MOSFETs is characterized. We measure individual trapped charge emission times and single-trapped charge-induced Vt shifts in BTI recovery. Statistical distributions of BTI trap characteristics such as trap spatial and energy distributions and trapped charge activation energy in emission are extracted. We compare the amplitudes of BTI and RTN single-charge-induced ΔVt. BTI-induced ΔVt exhibits a larger amplitude distribution tail. An explanation will be given by use of 3D atomistic numerical simulation. In addition, we find that Vt degradation in BTI stress exhibits two stages. The first stage has logarithmic stress time dependence and is believed due to the charging of preexisting high-k dielectric traps. The second stage follows power-law time dependence, which is attributed to dielectric trap creation.
Original language | English |
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Title of host publication | Bias Temperature Instability for Devices and Circuits |
Publisher | Springer New York |
Pages | 53-74 |
Number of pages | 22 |
Volume | 9781461479093 |
ISBN (Electronic) | 9781461479093 |
ISBN (Print) | 1461479088, 9781461479086 |
DOIs | |
State | Published - 1 Jul 2014 |