Standard 0.18um 1P6M CMOS IC foundry flow for accelerometer, analog readout circuit and wafer level capping package integration

C. J. Huang*, C. S. Chen, K. A. Wen, Y. T. Cheng, J. Y. Chen, C. S. Chang, W. C. Chou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

The first standard CMOS IC foundry flow is presented for the monolithic integration of MEMS sensor, analog readout circuit and wafer level capping on standard 0.18um 1P6M technology. The sensor and circuit parts are fabricated at first on the same 8'' substrate using a standard 0.18um 1P6M CMOS process. The sensor part is then micromachined and released by a foundry-based post-CMOS DRIE process followed by wafer level capping. The test vehicle for the proposed integration flow contains a single-axial accelerometer, analog readout circuit with input common-mode feedback and QFN64 package. The measurement results show that the whole system can have 206mV/g of sensitivity and output noise is less than 250μg/√Hz. The proposed methodology has led a promising way for integrating MEMS, IC and package in a conventional IC foundry manufacturing flow.

Original languageEnglish
Title of host publicationIEEE Sensors 2011 Conference, SENSORS 2011
Pages750-753
Number of pages4
DOIs
StatePublished - 1 Dec 2011
Event10th IEEE SENSORS Conference 2011, SENSORS 2011 - Limerick, Ireland
Duration: 28 Oct 201131 Oct 2011

Publication series

NameProceedings of IEEE Sensors

Conference

Conference10th IEEE SENSORS Conference 2011, SENSORS 2011
CountryIreland
CityLimerick
Period28/10/1131/10/11

Fingerprint Dive into the research topics of 'Standard 0.18um 1P6M CMOS IC foundry flow for accelerometer, analog readout circuit and wafer level capping package integration'. Together they form a unique fingerprint.

Cite this