Stability and performance optimization of InGaAs-OI and GeOI hetero-channel SRAM cells

Vita Pi Ho Hu*, Ming Long Fan, Pin Su, Ching Te Chuang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

InGaAs-OI and GeOI SRAM cells using optimized threshold voltage (Vt) design to enhance the intrinsic variation immunity of high-performance (super-threshold) and low-voltage (near-/sub-threshold) 6T SRAM cells are presented. For low-voltage SRAMs operating at low Vdd, low-Vt design shows smaller variability while the design trade-off between performance and leakage should be considered. For highperformance SRAMs operating at high Vdd, high-Vt design shows smaller variability. Moreover, compared with the SOI SRAMs with high-Vt design, InGaAs-OI/GeOI hetero-channel SRAM cells with high-Vt design exhibit improved Read/Write stability and performance, and maintain comparable RSNM variations for the high-performance SRAM applications.

Original languageEnglish
Title of host publication2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012
Pages77-80
Number of pages4
DOIs
StatePublished - 11 Dec 2012
Event42nd European Solid-State Device Research Conference, ESSDERC 2012 - Bordeaux, France
Duration: 17 Sep 201221 Sep 2012

Publication series

NameEuropean Solid-State Device Research Conference
ISSN (Print)1930-8876

Conference

Conference42nd European Solid-State Device Research Conference, ESSDERC 2012
CountryFrance
CityBordeaux
Period17/09/1221/09/12

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