This paper describes applications of Silicon on Insulator (SOI) to asynchrous dynamic circuits. The application also focuses on some important issues in SOI technology - performance gain, history effect, power reduction and pulsewidth control. These important issues are characterized with the help of self-resetting (SRCMOS) circuits which are used in building Register file macro (8 ports 32 wordline × 64 bitlines) and dynamic latch. The hardware results show that for 0.25μm Partially Depleted (PD) SOI technology shows 20-25% improvement in the performance and the reduction of 7 to 8% in power. Supply voltage, output loading, slew rate, duty cycle, input pulsewidth and temperature the history effect of the macro and is the aggregate of individual gates on the critical path. Based on the hardware it is shown that the performance of both register file and latch improves by 2-3.5% per 10° C reduction in temperature. The standby power for SOl reduces by 1.5% to 3% per 10° C temperature drop down to -30° C. The SOI chip is shown to have more significant performance improvement at low temperatures compared bulk chip due to the floating body effect which partially offsets the increase in the threshold voltages (Vt). The low temperature performalice gain is attributed to reduction in capacitance (around 7-8%) and rest is due to dynamic threshold voltages. At -30° C the register file is capable of functioning close to 1.02 GHz for read and write operations in a single cycle. The other key finding is the history effect commonly observed in SOI is reduced from 10% to 3% by lowering the operating temperature from room to -30° C.
|Number of pages||6|
|Journal||Proceedings of the IEEE Great Lakes Symposium on VLSI|
|State||Published - 1 Jan 2001|
|Event||11th Great Lakes Sysmposium on VLSI (GLSVLSI 2001) - West Lafayette, IN, United States|
Duration: 22 Mar 2001 → 23 Mar 2001