The use of silicon on insulator (SOI) technology in the fabrication of two scalable metal oxide semiconductor field effect transistors (MOSFET) was discussed. MOSFET scaling involved controlling the channel potential by the gate rather than the drain. Ultrathin body FET was scaled to 20nm gate length. FinFET, a double gate FET was scaled to below 10nm gate length using the technique.
|Number of pages||2|
|State||Published - 1 Jan 2001|
|Event||Device Research Conference (DRC) - Notre Dame, IN, United States|
Duration: 25 Jun 2001 → 27 Jun 2001
|Conference||Device Research Conference (DRC)|
|City||Notre Dame, IN|
|Period||25/06/01 → 27/06/01|