SOI and nanoscale MOSFETS

Chen-Ming Hu*

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

13 Scopus citations


The use of silicon on insulator (SOI) technology in the fabrication of two scalable metal oxide semiconductor field effect transistors (MOSFET) was discussed. MOSFET scaling involved controlling the channel potential by the gate rather than the drain. Ultrathin body FET was scaled to 20nm gate length. FinFET, a double gate FET was scaled to below 10nm gate length using the technique.

Original languageEnglish
Number of pages2
StatePublished - 1 Jan 2001
EventDevice Research Conference (DRC) - Notre Dame, IN, United States
Duration: 25 Jun 200127 Jun 2001


ConferenceDevice Research Conference (DRC)
CountryUnited States
CityNotre Dame, IN

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