Small Geometry MOS Transistor Capacitance Measurement Method Using Simple On-Chip Circuits

J. Oristian, H. Iwai, J. Walker, R. Dutton

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

A method of measuring the gate capacitance of very small geometry devices using simple on-chip circuits is described. Short-channel effects observed in gate capacitance measurements of an MOS transistor with Weff/Leff = 9.2 μm/0.8 μm are presented. Measurement results show that the resolution of the technique is much better than 0.1 fF.

Original languageEnglish
Pages (from-to)395-397
Number of pages3
JournalIEEE Electron Device Letters
Volume5
Issue number10
DOIs
StatePublished - Oct 1984

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