Single-electron effects in non-overlapped multiple-gate silicon-on-insulator metal-oxide-semiconductor field-effect transistors

W. Lee*, Pin Su

*Corresponding author for this work

Research output: Contribution to journalArticle

3 Scopus citations

Abstract

This paper systematically presents controlled single-electron effects in multiple-gate silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) with various gate lengths, fin widths, gate bias and temperature. Our study indicates that using the non-overlapped gate to source/drain structure as an approach to the single-electron transistor (SET) in MOSFETs is promising. Combining the advantage of gate control and the constriction of high source/drain resistances, single-electron effects are further enhanced using the multiple-gate architecture. From the presented results, downsizing multiple-gate SOI MOSFETs is needed for future room-temperature SET applications. Besides, the tunnel barriers and access resistances may need to be further optimized. Since the Coulomb blockade oscillation can be achieved in state-of-the-art complementary metal-oxide-semiconductor (CMOS) devices, it is beneficial to build SETs in low-power CMOS circuits for ultra-high-density purposes.

Original languageEnglish
Article number065202
JournalNanotechnology
Volume20
Issue number6
DOIs
StatePublished - 27 Apr 2009

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