Simultaneous optimization of analog circuits with reliability and variability for applications on flexible electronics

Yen Lung Chen, Wan Rong Wu, Chien-Nan Liu, James Chien Mo Li

Research output: Contribution to journalArticlepeer-review

19 Scopus citations

Abstract

Flexible electronics are a possible alternative for portable consumer applications and have many advantages. However, the circuit design for flexible electronics is still challenging, especially for sensitive analog circuits. Due to the different properties of flexible thin-film transistors (TFTs), conventional CMOS design techniques cannot be used directly on flexible electronics. Significant parameter variations and degradation effects of flexible TFTs further increase difficulties for circuit designers. In this paper, a reliability-aware circuit sizing approach is proposed for the analog circuits with flexible TFTs. The process variation, bending, and degradation effects of flexible TFTs in the optimization flow are considered simultaneously. Instead of optimizing the fresh yield and lifetime yield separately, a unified optimization approach is proposed to consider the two yield issues simultaneously. As shown in the experimental results, the proposed approach can further improve the lifetime yield and significantly reduce the design overhead with a fast computation time.

Original languageEnglish
Article number6685879
Pages (from-to)24-35
Number of pages12
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume33
Issue number1
DOIs
StatePublished - 1 Jan 2014

Keywords

  • Degradation
  • Parametric yield
  • Performance optimization
  • Transistor sizing

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