@inproceedings{36deebe0fcd84d2689354bee7e184082,
title = "Simulation of nanoscale round-top-gate bulk FinFETs with optimal geometry aspect ratio",
abstract = "In this paper, we explore electrical characteristics of a 25 nm round-top-gate FinFET on both bulk silicon and SOI substrates. Assuming an ideal fin angle θ = 90°, device performance of the FinFET with doped and undoped channels are simulated with a three-dimensional quantum correction transport model. Theoretical comparison shows that undoped bulk FinFETs possess promising electrical characteristics among different structures. Effect of non-ideal fin angle and fin height on device performance is investigated in terms of different shortchannel effects. Optimal configuration of structure for the 25 nm round-top-gate bulk FinFETs is drawn to show the strategy of fabrication in nanoscale CMOS devices.",
keywords = "Bulk silicon, CMOS, Fin angle, Fin heigth, FinFETs, Manufacturabilityt, Metal gate, Modeling and simulation, Nanodevice, Round-top, Short channel effec, SOI",
author = "Yiming Li and Chen, {Wei Hsin}",
year = "2006",
language = "English",
isbn = "1424400783",
series = "2006 6th IEEE Conference on Nanotechnology, IEEE-NANO 2006",
pages = "569--572",
booktitle = "2006 6th IEEE Conference on Nanotechnology, IEEE-NANO 2006",
note = "null ; Conference date: 17-06-2006 Through 20-06-2006",
}