@inproceedings{c7e1a5cd022844a4b28b71f60b3107ea,
title = "Simulation of grain-boundary induced Vth variability in stackable NAND flash using a Voronoi approach",
abstract = "In this work, we employ a novel Voronoi approach to simulate the impact of trap states in the poly-Si channel. Using this method, we investigate the grain boundary induced threshold voltage variability in stackable NAND flash memories. Our study indicates that considering the randomized shape and location of grain boundaries is crucial to the modeling and simulation of these devices.",
keywords = "BE-SONOS, Grain boundary, Voronoi, polycrystalline silicon, stackable NAND flash, variability",
author = "Yang, {Ching Wei} and Chao, {Shao Heng} and Pin Su",
year = "2012",
month = dec,
day = "1",
doi = "10.1109/NVMTS.2013.6632851",
language = "English",
isbn = "9781467328487",
series = "2012 12th Annual Non-Volatile Memory Technology Symposium Proceedings, NVMTS 2012",
pages = "12--15",
booktitle = "2012 12th Annual Non-Volatile Memory Technology Symposium Proceedings, NVMTS 2012",
note = "null ; Conference date: 31-10-2012 Through 02-11-2012",
}