TY - GEN
T1 - Simulation of electrical characteristics of surrounding- and omega-shaped-gate nanowire FinFETs
AU - Tang, Chien Shao
AU - Yu, Shao Ming
AU - Chou, Hong Mu
AU - Lee, Jam Wem
AU - Li, Yi-Ming
PY - 2004/8/16
Y1 - 2004/8/16
N2 - In this paper, electrical characteristics of sub-10 nm nanowirc FinFETs are investigated using a three-dimensional (3D) quantum correction simulation. Two different nanowire FinFETs, surrounding-gate FinFET and omega-shaped-gate one, are simulated with density-gradient-based model and compared in terms of on/off current, turn-on resistance, gate capacitance. It is found that the characteristic difference between surrounding-gate FinFET and omega-shaped-gate FinFET with a 70% coverage is insignificant. However, the former possesses better DIBL effect than that latter with different coverage ratios. Our examination presented here is useful in the fabrication of omega-shaped nanowire FinFETs. Nanodevice, semiconductor devices, nanowire, FinFET, omega-shaped-gate, surrounding-gate, quantum correction model, density-gradient, coverage ration, 3D simulation, turn-on and turn-off characteristics, gate capacitance, turn-on resistance, modeling and simulation.
AB - In this paper, electrical characteristics of sub-10 nm nanowirc FinFETs are investigated using a three-dimensional (3D) quantum correction simulation. Two different nanowire FinFETs, surrounding-gate FinFET and omega-shaped-gate one, are simulated with density-gradient-based model and compared in terms of on/off current, turn-on resistance, gate capacitance. It is found that the characteristic difference between surrounding-gate FinFET and omega-shaped-gate FinFET with a 70% coverage is insignificant. However, the former possesses better DIBL effect than that latter with different coverage ratios. Our examination presented here is useful in the fabrication of omega-shaped nanowire FinFETs. Nanodevice, semiconductor devices, nanowire, FinFET, omega-shaped-gate, surrounding-gate, quantum correction model, density-gradient, coverage ration, 3D simulation, turn-on and turn-off characteristics, gate capacitance, turn-on resistance, modeling and simulation.
UR - http://www.scopus.com/inward/record.url?scp=20344374683&partnerID=8YFLogxK
U2 - 10.1109/NANO.2004.1392325
DO - 10.1109/NANO.2004.1392325
M3 - Conference contribution
AN - SCOPUS:20344374683
SN - 0780385365
T3 - 2004 4th IEEE Conference on Nanotechnology
SP - 281
EP - 283
BT - 2004 4th IEEE Conference on Nanotechnology
Y2 - 16 August 2004 through 19 August 2004
ER -