Simulation of CMOS circuit degradation due to hot-carrier effects

Khandker N. Quader; Ping K. Ko; Chen-Ming Hu; Peng Fang; John T. Yue

doi:10.1109/RELPHY.1992.187616

Simulation of CMOS circuit degradation due to hot-carrier effects

Khandker N. Quader^*, Ping K. Ko, Chen-Ming Hu, Peng Fang, John T. Yue

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

18 Scopus citations

Abstract

By comparing long-term ring-oscillator hot-carrier degradation data and simulation results the authors show that a public-domain circuit simulator, BERT (Berkeley Reliability Tools), can predict CMOS digital circuit speed degradation from transistor DC stress data. Large initial PMOSFET drain current enhancement can result in initial frequency enhancement followed by an initial fast degradation due to the zero crossing effect. The relationship between circuit lifetime and transistor DC stress is examined.

Original language	English
Title of host publication	Annual Proceedings - Reliability Physics (Symposium)
Publisher	Publ by IEEE
Pages	16-23
Number of pages	8
ISBN (Print)	078030473X
DOIs	https://doi.org/10.1109/RELPHY.1992.187616
State	Published - 1 Mar 1992
Event	Proceedings of the 30th Annual International Reliability Physics Symposium - San Diego, CA, USA Duration: 31 Mar 1992 → 2 Apr 1992

Publication series

Name	Annual Proceedings - Reliability Physics (Symposium)
ISSN (Print)	0099-9512

Conference

Conference	Proceedings of the 30th Annual International Reliability Physics Symposium
City	San Diego, CA, USA
Period	31/03/92 → 2/04/92

Access to Document

10.1109/RELPHY.1992.187616

Fingerprint Dive into the research topics of 'Simulation of CMOS circuit degradation due to hot-carrier effects'. Together they form a unique fingerprint.

Cite this

@inproceedings{6cd8c4c15722430bb246881c8e1b9863,

title = "Simulation of CMOS circuit degradation due to hot-carrier effects",

abstract = "By comparing long-term ring-oscillator hot-carrier degradation data and simulation results the authors show that a public-domain circuit simulator, BERT (Berkeley Reliability Tools), can predict CMOS digital circuit speed degradation from transistor DC stress data. Large initial PMOSFET drain current enhancement can result in initial frequency enhancement followed by an initial fast degradation due to the zero crossing effect. The relationship between circuit lifetime and transistor DC stress is examined.",

author = "Quader, {Khandker N.} and Ko, {Ping K.} and Chen-Ming Hu and Peng Fang and Yue, {John T.}",

year = "1992",

month = mar,

day = "1",

doi = "10.1109/RELPHY.1992.187616",

language = "English",

isbn = "078030473X",

series = "Annual Proceedings - Reliability Physics (Symposium)",

publisher = "Publ by IEEE",

pages = "16--23",

booktitle = "Annual Proceedings - Reliability Physics (Symposium)",

note = "null ; Conference date: 31-03-1992 Through 02-04-1992",

}

Quader, KN, Ko, PK, Hu, C-M, Fang, P & Yue, JT 1992, Simulation of CMOS circuit degradation due to hot-carrier effects. in Annual Proceedings - Reliability Physics (Symposium). Annual Proceedings - Reliability Physics (Symposium), Publ by IEEE, pp. 16-23, Proceedings of the 30th Annual International Reliability Physics Symposium, San Diego, CA, USA, 31/03/92. https://doi.org/10.1109/RELPHY.1992.187616

Simulation of CMOS circuit degradation due to hot-carrier effects. / Quader, Khandker N.; Ko, Ping K.; Hu, Chen-Ming; Fang, Peng; Yue, John T.

Annual Proceedings - Reliability Physics (Symposium). Publ by IEEE, 1992. p. 16-23 (Annual Proceedings - Reliability Physics (Symposium)).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Simulation of CMOS circuit degradation due to hot-carrier effects

AU - Quader, Khandker N.

AU - Ko, Ping K.

AU - Hu, Chen-Ming

AU - Fang, Peng

AU - Yue, John T.

PY - 1992/3/1

Y1 - 1992/3/1

N2 - By comparing long-term ring-oscillator hot-carrier degradation data and simulation results the authors show that a public-domain circuit simulator, BERT (Berkeley Reliability Tools), can predict CMOS digital circuit speed degradation from transistor DC stress data. Large initial PMOSFET drain current enhancement can result in initial frequency enhancement followed by an initial fast degradation due to the zero crossing effect. The relationship between circuit lifetime and transistor DC stress is examined.

AB - By comparing long-term ring-oscillator hot-carrier degradation data and simulation results the authors show that a public-domain circuit simulator, BERT (Berkeley Reliability Tools), can predict CMOS digital circuit speed degradation from transistor DC stress data. Large initial PMOSFET drain current enhancement can result in initial frequency enhancement followed by an initial fast degradation due to the zero crossing effect. The relationship between circuit lifetime and transistor DC stress is examined.

UR - http://www.scopus.com/inward/record.url?scp=0026834356&partnerID=8YFLogxK

U2 - 10.1109/RELPHY.1992.187616

DO - 10.1109/RELPHY.1992.187616

M3 - Conference contribution

AN - SCOPUS:0026834356

SN - 078030473X

T3 - Annual Proceedings - Reliability Physics (Symposium)

SP - 16

EP - 23

BT - Annual Proceedings - Reliability Physics (Symposium)

PB - Publ by IEEE

Y2 - 31 March 1992 through 2 April 1992

ER -