Simulation-based functional test generation for embedded processors

Charles H.P. Wen*, Li C. Wang, Kwang Ting Cheng

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

35 Scopus citations


Deterministic functional test pattern generation has been a long-standing open problem, which is an important problem to be solved for both design verification and manufacturing testing. One key in developing a practical functional test pattern generation approach is to avoid the exponential growth of the test generation complexity in terms of the design size. This work proposes a novel functional test generation approach where simulation results are used to guide the generation of additional tests. Our methodology avoids the complexity growth issue by converting some modules in a design into simpler and more efficient models. Then, these models are used to facilitate the actual test generation process. We develop two sets of techniques to achieve these conversions: Boolean learning for random logic and arithmetic learning for datapath modules. We demonstrate the effectiveness and discuss the limitations of these techniques through experiments on benchmark circuits. Last, we validate the overall test generation methodology based on the OpenRISC 1200 microprocessor.

Original languageEnglish
Pages (from-to)1335-1343
Number of pages9
JournalIEEE Transactions on Computers
Issue number11
StatePublished - 1 Nov 2006


  • Functional test
  • Learning
  • Simulation
  • Test generation

Fingerprint Dive into the research topics of 'Simulation-based functional test generation for embedded processors'. Together they form a unique fingerprint.

Cite this