This paper gives an overview of CMOS scaling in the range of sub-0.1 μm. Recent advance in the downsizing of MOSFETs by using various new techniques is described. Possible limitation and of MOSFET downswing is predicted. A future concept of silicon LSIs in 2010's is discussed.
|Number of pages||8|
|State||Published - 1997|
|Event||Proceedings of the 1997 21st International Conference on Microelectronics, MIEL'97. Part 1 (of 2) - Nis, Yugosl|
Duration: 14 Sep 1997 → 17 Sep 1997
|Conference||Proceedings of the 1997 21st International Conference on Microelectronics, MIEL'97. Part 1 (of 2)|
|Period||14/09/97 → 17/09/97|