Silicon MOSFET scaling beyond 0.1 micron

Hiroshi Iwai

Silicon MOSFET scaling beyond 0.1 micron

Hiroshi Iwai^*

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Contribution to conference › Paper › peer-review

2 Scopus citations

Abstract

This paper gives an overview of CMOS scaling in the range of sub-0.1 μm. Recent advance in the downsizing of MOSFETs by using various new techniques is described. Possible limitation and of MOSFET downswing is predicted. A future concept of silicon LSIs in 2010's is discussed.

Original language	English
Pages	11-18
Number of pages	8
State	Published - 1997
Event	Proceedings of the 1997 21st International Conference on Microelectronics, MIEL'97. Part 1 (of 2) - Nis, Yugosl Duration: 14 Sep 1997 → 17 Sep 1997

Conference

Conference	Proceedings of the 1997 21st International Conference on Microelectronics, MIEL'97. Part 1 (of 2)
City	Nis, Yugosl
Period	14/09/97 → 17/09/97

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title = "Silicon MOSFET scaling beyond 0.1 micron",

abstract = "This paper gives an overview of CMOS scaling in the range of sub-0.1 μm. Recent advance in the downsizing of MOSFETs by using various new techniques is described. Possible limitation and of MOSFET downswing is predicted. A future concept of silicon LSIs in 2010's is discussed.",

author = "Hiroshi Iwai",

year = "1997",

language = "English",

pages = "11--18",

note = "null ; Conference date: 14-09-1997 Through 17-09-1997",

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TY - CONF

T1 - Silicon MOSFET scaling beyond 0.1 micron

AU - Iwai, Hiroshi

PY - 1997

Y1 - 1997

N2 - This paper gives an overview of CMOS scaling in the range of sub-0.1 μm. Recent advance in the downsizing of MOSFETs by using various new techniques is described. Possible limitation and of MOSFET downswing is predicted. A future concept of silicon LSIs in 2010's is discussed.

AB - This paper gives an overview of CMOS scaling in the range of sub-0.1 μm. Recent advance in the downsizing of MOSFETs by using various new techniques is described. Possible limitation and of MOSFET downswing is predicted. A future concept of silicon LSIs in 2010's is discussed.

UR - http://www.scopus.com/inward/record.url?scp=0031364756&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0031364756

SP - 11

EP - 18

Y2 - 14 September 1997 through 17 September 1997

ER -

Silicon MOSFET scaling beyond 0.1 micron

Abstract

Conference

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