@inproceedings{5fd0a3ad9a3d4c00bfbc588cee19e9bc,
title = "Silicide Optimization for Electrostatic Discharge Protection Devices in Sub- 100 nm CMOS Circuit Design",
abstract = "In this paper we propose a novel suicide optimization method for electrostatic discharge protection in nanoscale MOSFET devices. Based on the developed techniques, it has found that a comprehensive suicide optimization could be easily achieved on gate, drain, and source sides only with few designed testkeys. Compared with the fabricated and measured results, this technique also demonstrates very high characterization efficiency for various conditions. The method is in particular useful in deep sub-01 μm CMOS very large scale integrated circuit design, in which requires a robust electrostatic discharge protection device. Besides, a circuit level design of electrostatic discharge protection is also discussed for the system performance and speed evaluation.",
keywords = "2D simulation and optimization, ESD, Nanodevice, Silicide, VLSI circuit",
author = "Lee, {Jam Wem} and Yi-Ming Li and Howard Tang",
year = "2003",
month = jan,
language = "English",
isbn = "1932415106",
series = "Proceedings of the International Conference on VLSI",
pages = "251--257",
editor = "H.R. Arbania and L.T. Yang",
booktitle = "Proceedings of the International Conference on VLSI, VLSI 03",
note = "null ; Conference date: 23-06-2003 Through 26-06-2003",
}