Self-Aligned Nickel-Mono-Silicide Technology for High-Speed Deep Submicrometer Logic CMOS ULSI

Toyota Morimoto, Tatsuya Ohguro, Hisayo Sasaki Momose, Toshihiko Iinuma, Iwao Kunishima, Kyoichi Suguro, Ichiro Katakabe, Hiroomi Nakajima, Masakatsu Tsuchiaki, Mizuki Ono, Yasuhiro Katsumata, Hiroshi Iwai

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281 Scopus citations

Abstract

A nickel-monosilicide (NiSi) technology suitable for a deep sub-micron CMOS process has been developed. It has been confirmed that a nickel film sputtered onto n + - and p + -slngle-silicon and polysilicon substrates is uniformly converted into the mono-silicide (NiSi), without agglomeration, by low-temperature (400-600°C) rapid thermal annealing. This method ensures that the silicided layers have low resistivity. Redistribution of dopant atoms at the NiSi-Si interface is minimal, and a high dopant concentration is achieved at the silicide-silicon interface, thus contributing to low contact resistance. This NiSi technology was used in the experimental fabrication of deep-sub-micrometer CMOS structures; the current drivability of both n- and p-MOSFET's was higher than with the conventional titanium salicide process, and a ring oscillator constructed with the new MOSFET's also operated at higher speed.

Original languageEnglish
Pages (from-to)915-922
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume42
Issue number5
DOIs
StatePublished - May 1995

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    Morimoto, T., Ohguro, T., Momose, H. S., Iinuma, T., Kunishima, I., Suguro, K., Katakabe, I., Nakajima, H., Tsuchiaki, M., Ono, M., Katsumata, Y., & Iwai, H. (1995). Self-Aligned Nickel-Mono-Silicide Technology for High-Speed Deep Submicrometer Logic CMOS ULSI. IEEE Transactions on Electron Devices, 42(5), 915-922. https://doi.org/10.1109/16.381988