Abstract
We demonstrate a nonvolatile single transistor ferroelectric gate memory device with ultra-thin (5.5 nm) Hf0.8Zr0.2O2 (HZO) fabricated using a self-aligned gate last process. The FETs are fabricated using silicon-on-insulator wafers, and the ferroelectric is deposited with atomic layer deposition. The reported devices have an ON/OFF drain current ratio of up to 106, a read endurance of >10^{10} read cycles, and a program/erase endurance of 107 cycles. Furthermore, healing of the transistor after gate insulator breakdown is demonstrated.
| Original language | English |
|---|---|
| Article number | 8025570 |
| Pages (from-to) | 1379-1382 |
| Number of pages | 4 |
| Journal | IEEE Electron Device Letters |
| Volume | 38 |
| Issue number | 10 |
| DOIs | |
| State | Published - 1 Oct 2017 |
Keywords
- Ferroelectric
- gate last
- hafnium zirconium oxide
- memory
- silicon-on-insulator
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Cite this
Chatterjee, K., Kim, S., Karbasian, G., Tan, A. J., Yadav, A. K., Khan, A. I., Hu, C-M., & Salahuddin, S. (2017). Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf0.8Zr0.2O2, High Endurance and Breakdown Recovery. IEEE Electron Device Letters, 38(10), 1379-1382. [8025570]. https://doi.org/10.1109/LED.2017.2748992