Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf0.8Zr0.2O2, High Endurance and Breakdown Recovery

Korok Chatterjee; Sangwan Kim; Golnaz Karbasian; Ava J. Tan; Ajay K. Yadav; Asif I. Khan; Chen-Ming Hu; Sayeef Salahuddin

doi:10.1109/LED.2017.2748992

Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf_0.8Zr_0.2O₂, High Endurance and Breakdown Recovery

Korok Chatterjee^*, Sangwan Kim, Golnaz Karbasian, Ava J. Tan, Ajay K. Yadav, Asif I. Khan, Chen-Ming Hu, Sayeef Salahuddin

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Contribution to journal › Article › peer-review

46 Scopus citations

Abstract

We demonstrate a nonvolatile single transistor ferroelectric gate memory device with ultra-thin (5.5 nm) Hf_0.8Zr_0.2O₂ (HZO) fabricated using a self-aligned gate last process. The FETs are fabricated using silicon-on-insulator wafers, and the ferroelectric is deposited with atomic layer deposition. The reported devices have an ON/OFF drain current ratio of up to 10⁶, a read endurance of >10^{10} read cycles, and a program/erase endurance of 10⁷ cycles. Furthermore, healing of the transistor after gate insulator breakdown is demonstrated.

Original language	English
Article number	8025570
Pages (from-to)	1379-1382
Number of pages	4
Journal	IEEE Electron Device Letters
Volume	38
Issue number	10
DOIs	https://doi.org/10.1109/LED.2017.2748992
State	Published - 1 Oct 2017

Keywords

Ferroelectric
gate last
hafnium zirconium oxide
memory
silicon-on-insulator

Access to Document

10.1109/LED.2017.2748992

Fingerprint Dive into the research topics of 'Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf0.8Zr0.2O2, High Endurance and Breakdown Recovery'. Together they form a unique fingerprint.

Cite this

@article{51e3961a797f426d8b0cba10f777a9d6,

title = "Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf0.8Zr0.2O2, High Endurance and Breakdown Recovery",

abstract = "We demonstrate a nonvolatile single transistor ferroelectric gate memory device with ultra-thin (5.5 nm) Hf0.8Zr0.2O2 (HZO) fabricated using a self-aligned gate last process. The FETs are fabricated using silicon-on-insulator wafers, and the ferroelectric is deposited with atomic layer deposition. The reported devices have an ON/OFF drain current ratio of up to 106, a read endurance of >10^{10} read cycles, and a program/erase endurance of 107 cycles. Furthermore, healing of the transistor after gate insulator breakdown is demonstrated.",

keywords = "Ferroelectric, gate last, hafnium zirconium oxide, memory, silicon-on-insulator",

author = "Korok Chatterjee and Sangwan Kim and Golnaz Karbasian and Tan, {Ava J.} and Yadav, {Ajay K.} and Khan, {Asif I.} and Chen-Ming Hu and Sayeef Salahuddin",

year = "2017",

month = oct,

day = "1",

doi = "10.1109/LED.2017.2748992",

language = "English",

volume = "38",

pages = "1379--1382",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "10",

}

Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf_0.8Zr_0.2O₂, High Endurance and Breakdown Recovery. / Chatterjee, Korok; Kim, Sangwan; Karbasian, Golnaz; Tan, Ava J.; Yadav, Ajay K.; Khan, Asif I.; Hu, Chen-Ming; Salahuddin, Sayeef.

In: IEEE Electron Device Letters, Vol. 38, No. 10, 8025570, 01.10.2017, p. 1379-1382.

Research output: Contribution to journal › Article › peer-review

TY - JOUR

T1 - Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf0.8Zr0.2O2, High Endurance and Breakdown Recovery

AU - Chatterjee, Korok

AU - Kim, Sangwan

AU - Karbasian, Golnaz

AU - Tan, Ava J.

AU - Yadav, Ajay K.

AU - Khan, Asif I.

AU - Hu, Chen-Ming

AU - Salahuddin, Sayeef

PY - 2017/10/1

Y1 - 2017/10/1

N2 - We demonstrate a nonvolatile single transistor ferroelectric gate memory device with ultra-thin (5.5 nm) Hf0.8Zr0.2O2 (HZO) fabricated using a self-aligned gate last process. The FETs are fabricated using silicon-on-insulator wafers, and the ferroelectric is deposited with atomic layer deposition. The reported devices have an ON/OFF drain current ratio of up to 106, a read endurance of >10^{10} read cycles, and a program/erase endurance of 107 cycles. Furthermore, healing of the transistor after gate insulator breakdown is demonstrated.

AB - We demonstrate a nonvolatile single transistor ferroelectric gate memory device with ultra-thin (5.5 nm) Hf0.8Zr0.2O2 (HZO) fabricated using a self-aligned gate last process. The FETs are fabricated using silicon-on-insulator wafers, and the ferroelectric is deposited with atomic layer deposition. The reported devices have an ON/OFF drain current ratio of up to 106, a read endurance of >10^{10} read cycles, and a program/erase endurance of 107 cycles. Furthermore, healing of the transistor after gate insulator breakdown is demonstrated.

KW - Ferroelectric

KW - gate last

KW - hafnium zirconium oxide

KW - memory

KW - silicon-on-insulator

UR - http://www.scopus.com/inward/record.url?scp=85029183371&partnerID=8YFLogxK

U2 - 10.1109/LED.2017.2748992

DO - 10.1109/LED.2017.2748992

M3 - Article

AN - SCOPUS:85029183371

VL - 38

SP - 1379

EP - 1382

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

SN - 0741-3106

IS - 10

M1 - 8025570

ER -

Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf_0.8Zr_0.2O₂, High Endurance and Breakdown Recovery

Abstract

Keywords

Access to Document

Other files and links

Fingerprint Dive into the research topics of 'Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device with 5.5-nm Hf<sub>0.8</sub>Zr<sub>0.2</sub>O<sub>2</sub>, High Endurance and Breakdown Recovery'. Together they form a unique fingerprint.

Cite this