Selection of rare earth silicates for highly scaled gate dielectrics

K. Kakushima*, K. Okamoto, T. Koyanagi, M. Kouda, K. Tachi, T. Kawanago, J. Song, P. Ahmet, K. Tsutsui, N. Sugii, T. Hattori, H. Iwai

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

11 Scopus citations


An aggressive equivalent oxide thickness (EOT) scaling with high-k gate dielectrics has been demonstrated by ultra-thin La2O3 gate dielectric with a proper selection of rare earth (La-, Ce- and Pr-) silicates as an interfacial layer. Among silicates, Ce-silicate has shown the lowest interface-state density as low as 1011 cmv-2/eV with a high dielectric constant over 20. n-Type field-effect transistor (FET) with a small EOT of 0.51 nm has been successfully fabricated with a La 2O3 gate dielectric on a Ce-silicate interfacial layer after annealing at 500 °C. Negative shift in threshold voltage and reduced effective electron mobility has indicated the presence of fixed charges in the dielectric. Nonetheless, the high dielectric constant and nice interfacial property of Ce-silicate can be advantageous for the interfacial layer in highly scaled gate dielectrics.

Original languageEnglish
Pages (from-to)1868-1871
Number of pages4
JournalMicroelectronic Engineering
Issue number10
StatePublished - Oct 2010


  • EOT
  • HX-PES
  • Interfacial state density
  • Mobility
  • Rare earth oxides
  • Silicate

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