SCR device with dynamic holding voltage for on-chip ESD protection in a 0.25-μm fully salicided CMOS process

Ming-Dou Ker*, Zi Ping Chen

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

34 Scopus citations

Abstract

A dynamic-holding-voltage silicon-controlled rectifier (DHVSCR) device is proposed and verified in a 0.25-μm/2.5-V salicided CMOS process. In the DHVSCR device structure, the control nMOS and pMOS transistors are directly embedded in SCR device structure. The proposed DHVSCR device has the characteristics of tunable holding voltage and holding current by changing the gate voltage of embedded nMOS and pMOS. Under normal circuit operating condition, the DHVSCR has a holding voltage higher than the supply voltage without causing a latch-up issue. Under an electrostatic discharge (ESD) stress condition, the DHVSCR has a lower holding voltage to effectively clamp the overshooting ESD voltage. From the experimental results, the DHVSCR with a device width of 50 μm can sustain a human-body-model ESD level of 5.6 kV.

Original languageEnglish
Pages (from-to)1731-1733
Number of pages3
JournalIEEE Transactions on Electron Devices
Volume51
Issue number10
DOIs
StatePublished - 1 Oct 2004

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