Routability-driven bump assignment for chip-package co-design

Meng Ling Chen, Tu Hsiung Tsai, Hung-Ming Chen, Shi Hao Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In current chip and package designs, it is a bottleneck to simultaneously optimize both pin assignment and pin routing for different design domains (chip, package, and board). Usually the whole process costs a huge manual effort and multiple iterations thus reducing profit margin. Therefore, we propose a fast heuristic chip-package co-design algorithm in order to automatically obtain a bump assignment which introduces high routability both in RDL routing and substrate routing (100% in our real case). Experimental results show that the proposed method (inspired by board escape routing algorithms) automatically finishes bump assignment, RDL routing and substrate routing in a short time, while the traditional co-design flow requires weeks even months.

Original languageEnglish
Title of host publication2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings
Pages519-524
Number of pages6
DOIs
StatePublished - 27 Mar 2014
Event2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Suntec, Singapore
Duration: 20 Jan 201423 Jan 2014

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

Conference2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014
CountrySingapore
CitySuntec
Period20/01/1423/01/14

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