RF and logic performance improvement of In0.7Ga0.3 As/InAs/In0.7Ga0.3As composite-channel HEMT using gate-sinking technology

Chien I. Kuo*, Heng-Tung Hsu, Edward Yi Chang, Chia Yuan Chang, Yasuyuki Miyamoto, Suman Datta, Marko Radosavljevic, Guo Wei Huang, Ching Ting Lee

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

28 Scopus citations

Abstract

Eighty-nanometer-gate In0.7Ga0.3As/InAs/ In0.7Ga0.3As composite-channel high-electron mobility transistors (HEMTs), which are fabricated using platinum buried gate as the Schottky contact metal, were evaluated for RF and logic application. After gate sinking at 250 °C for 3 min, the device exhibited a high gm value of 1590 mS/mm at Vd = 0.5 V, the current-gain cutoff frequency fT was increased from 390 to 494 GHz, and the gate-delay time was decreased from 0.83 to 0.78 ps at supply voltage of 0.6 V. This is the highest fT achieved for 80-nm-gate-length HEMT devices. These superior performances are attributed to the reduction of distance between gate and channel and the reduction of parasitic gate capacitances during the gate-sinking process. Moreover, such superior performances were achieved through a very simple and straightforward fabrication process with optimal epistructure of the device.

Original languageEnglish
Pages (from-to)290-293
Number of pages4
JournalIEEE Electron Device Letters
Volume29
Issue number4
DOIs
StatePublished - 1 Apr 2008

Keywords

  • High-electron mobility transistors (HEMTs)
  • InAs
  • InGaAs
  • Platinum (Pt) buried gate

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