Reverse DRC channel performance analysis for 1xEV-DO: Third generation high-speed wireless data systems

Dongzhe Cui; Ching-Yao Huang; Zoran Siveski; Qi Bi

doi:10.1109/VETECF.2002.1040318

Reverse DRC channel performance analysis for 1xEV-DO: Third generation high-speed wireless data systems

Dongzhe Cui, Ching-Yao Huang, Zoran Siveski, Qi Bi

Institute of Electronics

Research output: Contribution to journal › Article

3 Scopus citations

Abstract

In 1xEV-Do system, the access terminal (AT) measures the channel condition and reports it through the reverse-link data rate control (DRC) channel to accommodate the asymmetric high-speed forward-link data traffic. Although a high DRC rate can provide a better forward-link channel estimation that will result in a more accurate channel assignment, the generated noise rise on the reverse link will degrade the reverse-link capacity. To understand the impacts on forward-link and reverse-link capacity, link-level simulations were performed to determine the required Eb/No for a given slot-error-rate criterion in the DRC channel. The tradeoff between the erasure rate and the required Eb/No in the DRC channel was also determined based on a simple DRC threshold setting mechanism. For different DRC lengths, the impact on the forward-link and the reverse-link throughputs is discussed.

Original language	English
Article number	29
Pages (from-to)	137-140
Number of pages	4
Journal	IEEE Vehicular Technology Conference
Volume	56
Issue number	1
DOIs	https://doi.org/10.1109/VETECF.2002.1040318
State	Published - 1 Jan 2002

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10.1109/VETECF.2002.1040318

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Cui, D., Huang, C-Y., Siveski, Z., & Bi, Q. (2002). Reverse DRC channel performance analysis for 1xEV-DO: Third generation high-speed wireless data systems. IEEE Vehicular Technology Conference, 56(1), 137-140. [29]. https://doi.org/10.1109/VETECF.2002.1040318

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