Abstract
Reliability issues affecting MOS and bipolar ICs are reviewed. Hot-carrier-induced degradation of MOS and bipolar circuits are used to illustrate the potential role of reliability CAD tools. Electromigration lifetimes under pulse DC and AC current stressing are longer than previously thought. Oxide breakdown offers a case study for accelerated test modeling, defect statistics, and burn-in optimization.
| Original language | English |
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| Pages | 438-442 |
| Number of pages | 5 |
| State | Published - 1 Dec 1989 |
| Event | Proceedings - 1989 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Cambridge, MA, USA Duration: 2 Oct 1989 → 4 Oct 1989 |
Conference
| Conference | Proceedings - 1989 IEEE International Conference on Computer Design: VLSI in Computers & Processors |
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| City | Cambridge, MA, USA |
| Period | 2/10/89 → 4/10/89 |