Reducing test point overhead with don't-cares

Kai Hui Chang*, Chia Wei Chang, Jie Hong Roland Jiang, Chien-Nan Liu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Test points provide additional control to design logic and can improve circuit testability. Traditionally, test points are activated by a global test enable signal, and routing the signal to the test points can be costly. To address this problem, we propose a new test point structure that utilizes controllability don't-cares to generate local test point activation signals. To support the structure, we propose new methods for extracting don't-cares from assertions and finite state machines in the design. Our empirical evaluation shows that don't-cares exist in many designs and can be used for reducing test point overhead.

Original languageEnglish
Title of host publication2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
Pages534-537
Number of pages4
DOIs
StatePublished - 16 Oct 2012
Event2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012 - Boise, ID, United States
Duration: 5 Aug 20128 Aug 2012

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Conference

Conference2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
CountryUnited States
CityBoise, ID
Period5/08/128/08/12

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