Reducing memory traffic and accelerating prolog execution in a superscalar prolog system

Ruey Liang Ma*, Chung-Ping Chung

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

Memory access operations constitute about 32.7% of all the operations executed in a typical Prolog program Among these memory accesses. 75% are to the program control structures (environments and choice points) These memory accesses plus possible data cache misses greatly impair system performance, and the problem is even more severe in a VLIW, superscalar, or superpipelined Prolog system. This paper describes an innovative windowed register file management technique called SORWT (splittabie overlapping register window technique). With SORWT, environments, choice points, and arguments can be stored in a windowed register file. SORWT reduces the number of memory accesses to only 25% of the number made when a conventional stack scheme is used. This paper describes in detail how Warren and PLM instructions can be implemented using SORWT, and it presents a register file overflow/underflow handling mechanism called the memory window matrix (MWM) and a mapping function for use between register windows and the MWM. Thirty benchmark programs are used to study performance issues, the overhead of SORWT, optimal register file and window sizes, and the argument overflow rate.

Original languageEnglish
Pages (from-to)859-884
Number of pages26
JournalJournal of Information Science and Engineering
Volume15
Issue number6
DOIs
StatePublished - 1 Nov 1999

Keywords

  • Fine-grained parallelism
  • Memory traffic reduction
  • Modified windowed register file
  • Prolog system design
  • Simulation
  • Window overflow handling

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