Real-Time Disparity Estimation Engine for High-Definition 3 DTV Applications

Yu Cheng Tseng*, Tian-Sheuan Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

Abstract

Disparity estimation for high-definition 3DTV applications demands high computational cost and memory cost, which prohibits its real-time applications. To solve this problem, this chapter proposes the downsampled matching cost to substantially reduce the computational cost, and the hardware-efficient cost diffusion to decrease the memory cost in disparity optimization. To further refine the quality, this chapter proposes new temporal consistency enhancement to deal with flicker and foreground copy artifacts, and the intra/inter-view occlusion handling to refine disparity maps. The proposed algorithm is implemented with a three-stage pipelining architecture. The final disparity estimation engine can achieve 95 frames/s throughput to support three HD1080p views with 1645K gate counts and 59.4-Kbyte internal memory. The objective evaluation shows our disparity quality is comparable to the state-of-the-art algorithm.

Original languageEnglish
Title of host publicationEmerging Technologies for 3D Video
Subtitle of host publicationCreation, Coding, Transmission and Rendering
PublisherJohn Wiley and Sons
Pages468-485
Number of pages18
ISBN (Print)9781118355114
DOIs
StatePublished - 22 Apr 2013

Keywords

  • 3D video
  • Disparity estimation
  • VLSI design

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