Real-Time and low-memory multi-face detection system design based on naive Bayes classifier using FPGA

Yon-Ping Chen, Chong Hsien Liu, Kuan Yu Chou*, Shun Yi Wang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

In recent years, face detection is widely used in various fields, such as face recognition, image focusing, and surveillance systems. This study proposes a real-Time face detection system based on naive Bayesian classifier using Field-programmable gate array(FPGA). The detection system divided into three main parts, feature extraction, candidate face detection, and false elimination. First, downscale the image to the image pyramid and extract local binary image features from each downscaling image; then features go through the naive Bayesian classifier to identify candidate faces. Finally, use skin color filter and face overlapping elimination to remove false positives. Detection results output to the monitor in VGA. In this paper, face detection system to implement in FPGA. As a result of the FPGA parallel processing, in 640×480 resolutions, the face detection of an image executes within 16.7 milliseconds; the improved local binary features, compared to Haar features, save around 140 times the amount of memory. The experimental results show that the accuracy rate is higher than 95% in face detection, which implies the proposed real-Time detection system is indeed effective and efficient.

Original languageEnglish
Title of host publication2016 International Automatic Control Conference, CACS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages7-12
Number of pages6
ISBN (Electronic)9781509041084
DOIs
StatePublished - 10 Jul 2017
Event2016 International Automatic Control Conference, CACS 2016 - Taichung, Taiwan
Duration: 9 Nov 201611 Nov 2016

Publication series

Name2016 International Automatic Control Conference, CACS 2016

Conference

Conference2016 International Automatic Control Conference, CACS 2016
CountryTaiwan
CityTaichung
Period9/11/1611/11/16

Keywords

  • Face detection
  • Field-programmable gate array (FPGA)
  • Naive Bayes classifier
  • local binary pattern (LBP)
  • skin color detection

Fingerprint Dive into the research topics of 'Real-Time and low-memory multi-face detection system design based on naive Bayes classifier using FPGA'. Together they form a unique fingerprint.

Cite this