Random interface-traps-induced characteristic fluctuation in 16-nm high-/metal gate CMOS device and SRAM circuit

Hui Wen Chen*, Yung Yueh Chiu, Yiming Li

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

In this work, we study the interface traps (ITs) induced electrical characteristic and static noise margin (SNM) fluctuations in 16-nm-gate high-/metal gate complementary metal-oxide-semiconductor devices and static random asccess memory circuit. Totally random generated device samples with 2D ITs at silicon/HfO 2 interface are simulated using an experimentally validated 3D device simulation. Random number and position of ITs and trap's density on fluctuations of threshold voltage, on/off-state current and gate capacitance are explored and compared among process variation effect (PVE), random dopant fluctuation (RDF) and work function fluctuation (WKF). Notably, the position of ITs induces rather different fluctuation in spite of the same number of ITs.

Original languageEnglish
Title of host publication2011 11th IEEE International Conference on Nanotechnology, NANO 2011
Pages1159-1162
Number of pages4
DOIs
StatePublished - 2011
Event2011 11th IEEE International Conference on Nanotechnology, NANO 2011 - Portland, OR, United States
Duration: 15 Aug 201119 Aug 2011

Publication series

NameProceedings of the IEEE Conference on Nanotechnology
ISSN (Print)1944-9399
ISSN (Electronic)1944-9380

Conference

Conference2011 11th IEEE International Conference on Nanotechnology, NANO 2011
CountryUnited States
CityPortland, OR
Period15/08/1119/08/11

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    Chen, H. W., Chiu, Y. Y., & Li, Y. (2011). Random interface-traps-induced characteristic fluctuation in 16-nm high-/metal gate CMOS device and SRAM circuit. In 2011 11th IEEE International Conference on Nanotechnology, NANO 2011 (pp. 1159-1162). [6144566] (Proceedings of the IEEE Conference on Nanotechnology). https://doi.org/10.1109/NANO.2011.6144566