Quick supply current waveform estimation at gate level using existed cell library information

Mu Shun Lee*, Chin Hsun Lin, Chien-Nan Liu, Shih Che Lin

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

In nanometer era, the power integrity problem has become one of the critical issues. Although checking this problem at higher level can speedup the analysis, not so many tools are available now due to the limited design information at high levels. Most existing approaches at gate level require extra information of the cell library, which may require extra characterization efforts while migrating to new cell libraries. Therefore, we propose an accurate approach to estimate the supply current waveform of sequential circuits at gate level using existing library information only. The experimental results have shown that the estimation errors of our approach are less than 9% compared to HSPICE results, which are better than the rough estimation in [8].

Original languageEnglish
Title of host publicationGLSVLSI 2008
Subtitle of host publicationProceedings of the 2008 ACM Great Lakes Symposium on VLSI
Pages135-138
Number of pages4
DOIs
StatePublished - 1 Dec 2008
EventGLSVLSI 2008: 18th ACM Great Lakes Symposium on VLSI 2008 - Orlando, FL, United States
Duration: 4 Mar 20086 Mar 2008

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Conference

ConferenceGLSVLSI 2008: 18th ACM Great Lakes Symposium on VLSI 2008
CountryUnited States
CityOrlando, FL
Period4/03/086/03/08

Keywords

  • Current waveform estimation
  • Gate-level

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