A substrate current model and a quasistatic hot-electron-induced MOSFET degradation model were implemented using the substrate current and lifetime evaluator (SCALE) software tools. It is shown that quasistatic simulation is valid for a class of waveforms, including those encountered in inverter-based logic circuits. The validity and limitations of the model are illustrated by experimental results. Scale is linked to SPICE externally in a pre- and post-processor fashion to form an independent simulator. The preprocessor interprets the input deck, and requests SPICE to output the transient node voltages of the user-selected devices. The postprocessor then calculates the transient substrate current and makes lifetime prediction.
|Number of pages||4|
|Journal||Technical Digest - International Electron Devices Meeting|
|State||Published - 1 Dec 1987|