QUASI-STATIC SIMULATION OF HOT-ELECTRON-INDUCED MOSFET DEGRADATION UNDER AC (PULSE) STRESS.

M. M. Kuo*, K. Seki, P. M. Lee, J. Y. Choi, P. K. Ko, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

8 Scopus citations

Abstract

A substrate current model and a quasistatic hot-electron-induced MOSFET degradation model were implemented using the substrate current and lifetime evaluator (SCALE) software tools. It is shown that quasistatic simulation is valid for a class of waveforms, including those encountered in inverter-based logic circuits. The validity and limitations of the model are illustrated by experimental results. Scale is linked to SPICE externally in a pre- and post-processor fashion to form an independent simulator. The preprocessor interprets the input deck, and requests SPICE to output the transient node voltages of the user-selected devices. The postprocessor then calculates the transient substrate current and makes lifetime prediction.

Original languageEnglish
Pages (from-to)47-50
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
DOIs
StatePublished - 1 Dec 1987

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