Quasi-planar FinFETs with selectively grown germanium raised source/drain

N. Lindert*, Y. K. Choi, L. Chang, E. Anderson, W. C. Lee, T. J. King, J. Bokor, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

7 Scopus citations


The source/drain quasi-planar FinFET devices were presented by the combination of the new FinFET process flow with a selective Ge growth technique. The current was raised by 28% with a Ge raised sorce/drain process in the double-gate devices. A minimal 3% degradation in drive current was produced as shown by the worst case misalignment. The current-voltage characteristics were measured and the absence of excessive gate current indicated that bridging between the gate and source/drain did not occur.

Original languageEnglish
Number of pages2
StatePublished - 1 Jan 2001
Event2001 IEEE International SOI Conference - Durango, CO, United States
Duration: 1 Oct 20014 Oct 2001


Conference2001 IEEE International SOI Conference
CountryUnited States
CityDurango, CO

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