PVT-aware digital controlled voltage regulator design for ultra-low-power (ULP) DVFS systems

Pei Chen Wu, Yi Ping Kuo, Chung Shiang Wu, Ching Te Chuang, Yuan Hua Chu, Wei Hwang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

On-chip regulators are becoming increasingly important for ultra-low voltage nano-scale SoC systems. In this paper, an all-digital controlled linear regulator is presented. A novel Process-Voltage-Temperature (PVT) -aware design is implemented to mitigate environmental variations and to guarantee the resolution of the liner regulator. The proposed digital voltage regulator can achieve up to 98.4% current efficiency. This design leads to three major advantages: (1) fast response time of 60ns, (2) low quiescent current 162μA in a stable state, and (3) PVT tolerance. The settling time is about 138ns. The output voltage error in 0.3V stable states with error improvement of the resolution using PVT-aware DED is around 50%. The best FOM at the regulated voltage (VREG) of 0.51V is 4.2 pA·s. This digital controlled voltage regulator is designed and implemented for near-/sub- threshold operations. It can generate VREG from 0.3V ∼ 0.51V in steps of 30mV without resolution degradation under PVT variations. The total area of the regulator is about 388.6×35.7μm2 using TSMC 65-nm low-power bulk CMOS technology.

Original languageEnglish
Title of host publicationInternational System on Chip Conference
EditorsRamalingam Sridhar, Danella Zhao, Kaijian Shi, Thomas Buchner
PublisherIEEE Computer Society
Pages136-139
Number of pages4
ISBN (Electronic)9781479933785
DOIs
StatePublished - 5 Nov 2014
Event27th IEEE International System on Chip Conference, SOCC 2014 - Las Vegas, United States
Duration: 2 Sep 20145 Sep 2014

Publication series

NameInternational System on Chip Conference
ISSN (Print)2164-1676
ISSN (Electronic)2164-1706

Conference

Conference27th IEEE International System on Chip Conference, SOCC 2014
CountryUnited States
CityLas Vegas
Period2/09/145/09/14

Keywords

  • digital regulator
  • linear voltage regulator
  • PVT compensation
  • PVT sensor
  • PVT variation

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