Prospect of tunneling green transistor for 0.1V CMOS

Chen-Ming Hu*, Pratik Patel, Anupama Bowonder, Kanghoon Jeon, Sung Hwan Kim, Wei Yip Loh, Chang Yong Kang, Jungwoo Oh, Prashant Majhi, Ali Javey, Tsu Jae King Liu, Raj Jammy

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

52 Scopus citations

Abstract

Well designed tunneling green transistor may enable future VLSIs operating at 0.1V. Sub-60mV/decade characteristics have been convincingly demonstrated on 8" wafers. Large ION at low VDD are possible according to TCAD simulations but awaits verification. VDD scaling will greatly benefit from low (effective) band gap energy, which may be provided by type II heterojunctions of Si/Ge or compound semiconductors.

Original languageEnglish
Title of host publication2010 IEEE International Electron Devices Meeting, IEDM 2010
DOIs
StatePublished - 1 Dec 2010
Event2010 IEEE International Electron Devices Meeting, IEDM 2010 - San Francisco, CA, United States
Duration: 6 Dec 20108 Dec 2010

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Conference

Conference2010 IEEE International Electron Devices Meeting, IEDM 2010
CountryUnited States
CitySan Francisco, CA
Period6/12/108/12/10

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  • Cite this

    Hu, C-M., Patel, P., Bowonder, A., Jeon, K., Kim, S. H., Loh, W. Y., Kang, C. Y., Oh, J., Majhi, P., Javey, A., Liu, T. J. K., & Jammy, R. (2010). Prospect of tunneling green transistor for 0.1V CMOS. In 2010 IEEE International Electron Devices Meeting, IEDM 2010 [5703372] (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2010.5703372