Power reduction by register relabeling for crosstalk-toggling free instruction bus coding

Tsung Hsi Weng*, Chun Han Lin, Jyh-Jiun Shann, Chung-Ping Chung

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations


As process technology moves toward the deep submicron level, crosstalk effects are increasingly important considerations especially when adjacent bus lines switch in opposite directions (so called crosstalk-toggling transitions). Crosstalk-toggling transitions not only increase power consumption but also increase transition delays. While many bus encoding schemes have been proposed to totally avoid crosstalk-toggling transitions thus reducing transition delays in synchronous circuit designs, opportunities exist to additionally reduce power consumption. We propose a register relabeling algorithm to further reduce the instruction bus power consumption based on the existing Selective Shielding method. With no extra hardware requirements and no performance loss, the average energy consumption of our design is 94% compared with an unencoded instruction bus using 90nm technology with a 14mm bus length, and 13% less than that of an instruction bus with Selective Shielding coding. Our scheme makes Selective Shielding method save more energy.

Original languageEnglish
Title of host publicationICS 2010 - International Computer Symposium
Number of pages6
StatePublished - 1 Dec 2010
Event2010 International Computer Symposium, ICS 2010 - Tainan, Taiwan
Duration: 16 Dec 201018 Dec 2010

Publication series

NameICS 2010 - International Computer Symposium


Conference2010 International Computer Symposium, ICS 2010


  • Bus coding
  • Crosstalk
  • Energy reduction
  • Power reduction
  • Register relabeling
  • Selective shielding

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