Polycrystalline-silicon thin-film transistors with low-temperature gate dielectrics

Thin-film transistors (TFTs) have been fabricated by using low-pressure chemical vapor deposition (LPCVD) polycrystalline-silicon (poly-Si) film as the active layer. Various gate dielectrics, i.e. hightemperature gate oxides with different thicknesses, low-temperature thin gate oxides, different combinations of oxide/nitride (O/N) structures with various thicknesses, as well as low-temperature oxide/nitride gate dielectrics have been performed. Their effects on the poly-Si TFTs were investigated. The effective carrier mobility of the devices with thin gate oxides are several times larger than those with thick gate oxides. However, the breakdown voltages of thin gate oxides are too low to satisfy the requirements of TFTs. Silicon nitride deposited by LPCVD can be a substitution due to low fabrication temperatures (700°C to 900°C), high breakdown field, and smooth dielectric/poly-Si interfaces, but the problem of adopting silicon nitride is the large stress between silicon nitride and silicon substrate. A thin thermal pad oxide beneath the silicon nitride was therefore grown in order to reduce the high stress at the interface between silicon nitride and poly-Si layer of TFTs. Since thinning the gate dielectrics with O/N structure commits a compromise between better performance and larger stress. Therefore, the optimum thickness of pad oxide is found to be 100Å. Hence, high-performance TFTs with O/N gates can be fabricated at the processing temperatures below 800°C to satisfy the requirements of TFTs in the liquid crystal displays(LCDs).