Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory

Kuan Ti Wang; Tien-Sheng Chao; Tsung Yu Chiang; Woei Cherng Wu; Po Yi Kuo; Yi Hon Wu; Yu Lun Lu; Chia Chun Liao; Wen Luh Yang; Chien Hsing Lee; Tsung Min Hsieh; Jhyy Cheng Liou; Shen De Wang; Tzu Pin Chen; Chien Hung Chen; Chih Hung Lin; Hwi Huang Chen

doi:10.1109/LED.2009.2031601

Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory

Kuan Ti Wang^*, Tien-Sheng Chao, Tsung Yu Chiang, Woei Cherng Wu, Po Yi Kuo, Yi Hon Wu, Yu Lun Lu, Chia Chun Liao, Wen Luh Yang, Chien Hsing Lee, Tsung Min Hsieh, Jhyy Cheng Liou, Shen De Wang, Tzu Pin Chen, Chien Hung Chen, Chih Hung Lin, Hwi Huang Chen

^*Corresponding author for this work

Department of Electrophysics

Research output: Contribution to journal › Article › peer-review

3 Scopus citations

Abstract

For the first time, a programming mechanism for conventional source-side injection (SSI) (normal mode), substrate-bias enhanced SSI (body mode), and dynamic-threshold SSI (DTSSI) (DT mode) of a wrapped-select-gate SONOS memory is developed with 2-D Poisson equation and hot-electron simulation and programming characteristic measurement for nor Flash memory. Compared with traditional SSI, DTSSI mechanisms are determined in terms of lateral acceleration electric field and programming current (I _PGM ) in the neutral gap region, resulting in high programming efficiency. Furthermore, the lateral electric field intersects the vertical electric field, indicating that the main charge injection point is from the end edge of the gap region close to the word gate.

Original language	English
Pages (from-to)	1206-1208
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	30
Issue number	11
DOIs	https://doi.org/10.1109/LED.2009.2031601
State	Published - 6 Nov 2009

Keywords

Memory
Programming mechanism
Wrappedselect-gate SONOS (WSG SONOS)

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Wang, K. T., Chao, T-S., Chiang, T. Y., Wu, W. C., Kuo, P. Y., Wu, Y. H., Lu, Y. L., Liao, C. C., Yang, W. L., Lee, C. H., Hsieh, T. M., Liou, J. C., Wang, S. D., Chen, T. P., Chen, C. H., Lin, C. H., & Chen, H. H. (2009). Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory. IEEE Electron Device Letters, 30(11), 1206-1208. https://doi.org/10.1109/LED.2009.2031601

Wang, Kuan Ti ; Chao, Tien-Sheng ; Chiang, Tsung Yu ; Wu, Woei Cherng ; Kuo, Po Yi ; Wu, Yi Hon ; Lu, Yu Lun ; Liao, Chia Chun ; Yang, Wen Luh ; Lee, Chien Hsing ; Hsieh, Tsung Min ; Liou, Jhyy Cheng ; Wang, Shen De ; Chen, Tzu Pin ; Chen, Chien Hung ; Lin, Chih Hung ; Chen, Hwi Huang. / Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory. In: IEEE Electron Device Letters. 2009 ; Vol. 30, No. 11. pp. 1206-1208.

@article{76a92ba1efea40aaadcc2f4992509dfb,

title = "Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory",

abstract = " For the first time, a programming mechanism for conventional source-side injection (SSI) (normal mode), substrate-bias enhanced SSI (body mode), and dynamic-threshold SSI (DTSSI) (DT mode) of a wrapped-select-gate SONOS memory is developed with 2-D Poisson equation and hot-electron simulation and programming characteristic measurement for nor Flash memory. Compared with traditional SSI, DTSSI mechanisms are determined in terms of lateral acceleration electric field and programming current (I PGM ) in the neutral gap region, resulting in high programming efficiency. Furthermore, the lateral electric field intersects the vertical electric field, indicating that the main charge injection point is from the end edge of the gap region close to the word gate.",

keywords = "Memory, Programming mechanism, Wrappedselect-gate SONOS (WSG SONOS)",

author = "Wang, {Kuan Ti} and Tien-Sheng Chao and Chiang, {Tsung Yu} and Wu, {Woei Cherng} and Kuo, {Po Yi} and Wu, {Yi Hon} and Lu, {Yu Lun} and Liao, {Chia Chun} and Yang, {Wen Luh} and Lee, {Chien Hsing} and Hsieh, {Tsung Min} and Liou, {Jhyy Cheng} and Wang, {Shen De} and Chen, {Tzu Pin} and Chen, {Chien Hung} and Lin, {Chih Hung} and Chen, {Hwi Huang}",

year = "2009",

month = nov,

day = "6",

doi = "10.1109/LED.2009.2031601",

language = "English",

volume = "30",

pages = "1206--1208",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "11",

}

Wang, KT, Chao, T-S, Chiang, TY, Wu, WC, Kuo, PY, Wu, YH, Lu, YL, Liao, CC, Yang, WL, Lee, CH, Hsieh, TM, Liou, JC, Wang, SD, Chen, TP, Chen, CH, Lin, CH & Chen, HH 2009, 'Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory', IEEE Electron Device Letters, vol. 30, no. 11, pp. 1206-1208. https://doi.org/10.1109/LED.2009.2031601

Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory. / Wang, Kuan Ti; Chao, Tien-Sheng; Chiang, Tsung Yu; Wu, Woei Cherng; Kuo, Po Yi; Wu, Yi Hon; Lu, Yu Lun; Liao, Chia Chun; Yang, Wen Luh; Lee, Chien Hsing; Hsieh, Tsung Min; Liou, Jhyy Cheng; Wang, Shen De; Chen, Tzu Pin; Chen, Chien Hung; Lin, Chih Hung; Chen, Hwi Huang.

In: IEEE Electron Device Letters, Vol. 30, No. 11, 06.11.2009, p. 1206-1208.

Research output: Contribution to journal › Article › peer-review

TY - JOUR

T1 - Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory

AU - Wang, Kuan Ti

AU - Chao, Tien-Sheng

AU - Chiang, Tsung Yu

AU - Wu, Woei Cherng

AU - Kuo, Po Yi

AU - Wu, Yi Hon

AU - Lu, Yu Lun

AU - Liao, Chia Chun

AU - Yang, Wen Luh

AU - Lee, Chien Hsing

AU - Hsieh, Tsung Min

AU - Liou, Jhyy Cheng

AU - Wang, Shen De

AU - Chen, Tzu Pin

AU - Chen, Chien Hung

AU - Lin, Chih Hung

AU - Chen, Hwi Huang

PY - 2009/11/6

Y1 - 2009/11/6

N2 - For the first time, a programming mechanism for conventional source-side injection (SSI) (normal mode), substrate-bias enhanced SSI (body mode), and dynamic-threshold SSI (DTSSI) (DT mode) of a wrapped-select-gate SONOS memory is developed with 2-D Poisson equation and hot-electron simulation and programming characteristic measurement for nor Flash memory. Compared with traditional SSI, DTSSI mechanisms are determined in terms of lateral acceleration electric field and programming current (I PGM ) in the neutral gap region, resulting in high programming efficiency. Furthermore, the lateral electric field intersects the vertical electric field, indicating that the main charge injection point is from the end edge of the gap region close to the word gate.

AB - For the first time, a programming mechanism for conventional source-side injection (SSI) (normal mode), substrate-bias enhanced SSI (body mode), and dynamic-threshold SSI (DTSSI) (DT mode) of a wrapped-select-gate SONOS memory is developed with 2-D Poisson equation and hot-electron simulation and programming characteristic measurement for nor Flash memory. Compared with traditional SSI, DTSSI mechanisms are determined in terms of lateral acceleration electric field and programming current (I PGM ) in the neutral gap region, resulting in high programming efficiency. Furthermore, the lateral electric field intersects the vertical electric field, indicating that the main charge injection point is from the end edge of the gap region close to the word gate.

KW - Memory

KW - Programming mechanism

KW - Wrappedselect-gate SONOS (WSG SONOS)

UR - http://www.scopus.com/inward/record.url?scp=70350591549&partnerID=8YFLogxK

U2 - 10.1109/LED.2009.2031601

DO - 10.1109/LED.2009.2031601

M3 - Article

AN - SCOPUS:70350591549

VL - 30

SP - 1206

EP - 1208

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

SN - 0741-3106

IS - 11

ER -

Physical mechanism of high-programming-efficiency dynamic-threshold source-side injection in wrapped-select-gate SONOS for nor-type flash memory

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Keywords

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