Performance of dual-channel gate-all-around polysilicon nanowire thin-film transistor

Po Chun Huang*, Tzu Shiun Sheu, Chen Chia Chen, Lu An Chen, Jeng-Tzong Sheu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this work, performance of dual-channel GAA poly-Si nanowire TFT with NH 3 plasma passivation was demonstrated. The proposed devices exhibit low leakage current in off state, a high I on /I off current ratio, a low subthreshold slope, an absence of DIBL and promising output characteristics. It is believed that this high performance poly-Si TFT is suitable for future applications.

Original languageEnglish
Title of host publicationIEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
DOIs
StatePublished - 1 Dec 2008
EventIEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 - Honolulu, HI, United States
Duration: 15 Jun 200816 Jun 2008

Publication series

NameIEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

Conference

ConferenceIEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
CountryUnited States
CityHonolulu, HI
Period15/06/0816/06/08

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