Performance improvement of hardware-based packet classification algorithm

Yaw-Chung Chen*, Pi Chung Wang, Chun Liang Lee, Chia Tai Chan

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review


Packet classification is important in fulfilling the requirements of differentiated services in next generation networks. In the previous work, we presented an efficient hardware scheme, Condensate Bit Vector, based on bit vectors. The scheme significantly improves the seal-ability of packet classification. In this work, the characteristics of Condensate Bit Vector are further illustrated, and two drawbacks that may negatively affect the performance of Condensate Bit Vector are revealed. We show the solution to resolve the weaknesses and introduce the new schemes, Condensate Ordered Bit Vector and Condensate and Aggregate Ordered Bit Vector. Experiments show that our new algorithms drastically improve the search speed as compared to the original algorithm.

Original languageEnglish
Pages (from-to)728-736
Number of pages9
JournalLecture Notes in Computer Science
Issue numberII
StatePublished - 24 Oct 2005
EventNetworking - ICN 2005 - Reunion Island, France
Duration: 17 Apr 200521 Apr 2005

Fingerprint Dive into the research topics of 'Performance improvement of hardware-based packet classification algorithm'. Together they form a unique fingerprint.

Cite this